Design of Negative Bias Temperature Instability ( NBTI ) Tolerant Register File
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چکیده
Design of Negative Bias Temperature Instability (NBTI) Tolerant Register File
منابع مشابه
Stress Analysis and Temperature Impact of Negative Bias Temperature Instability (NBTI) on a CMOS inverter circuit
Negative Bias Temperature Instability(NBTI) has become an important reliability concern for ultra-scaled Silicon IC technology with significant implications for both analog and digital circuit design. As the Integrated Circuits (IC) density keeps on increasing with the scaling of CMOS devices in each successive technology generation, stress analysis or reliability concerns mainly Negative Bias ...
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The degradation of CMOS devices over the lifetime can cause severe threat to the system performance and reliability at deep submicron semiconductor technologies. The negative bias temperature instability (NBTI) is among the most important sources of the aging mechanisms. Applying the traditional guardbanding technique to address the decreased speed of devices is too costly. On-chip memory struc...
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Negative bias temperature instability (NBTI) and positive bias temperature instability (PBTI) are critical circuit reliability issues in highly scaled CMOS technologies. In this paper, we analyze the impacts of NBTI and PBTI on SRAM VMIN, and present a design solution for mitigating the impact of NBTI and PBTI on SRAM VMIN. Two different types of SRAM VMIN (SNM-limited VMIN and time-limited VMI...
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Negative Bias Temperature Instability (NBTI) is one of the serious concerns for long-term circuit performance degradation. NBTI degrades PMOS transistors under negative bias, whereas they recover once negative bias is removed. In this paper, we propose a mitigation method for NBTI-induced performance degradation that exploits the recovery property by shifting random input sequence through scan ...
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Kufluoglu, Haldun Ph.D., Purdue University, December, 2007. MOSFET Degradation due to Negative Bias Temperature Instability (NBTI) and Hot Carrier Injection (HCI) and Its Implications for Reliability-aware VLSI Design . Major Professor: Muhammad A. Alam. The scaling trends in CMOS technology and operating conditions give rise to serious degradation mechanisms such as Negative Bias Temperature I...
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